Smaller Chip Architectures Are Making Digital Power an Imperative(小型のチップアーキテクチャによりデジタル電源が必要不可欠に)

2014年1月10日


Smaller Chip Architectures Are Making Digital Power an Imperative(小型のチップアーキテクチャによりデジタル電源が必要不可欠に)

The article “Smaller Chip Architectures Are Making Digital Power an Imperative” written by CUI’s Mark Adams and published by EE Times, discusses the role digital power is playing to help address some of the challenges caused by rising transistor density in chip architectures.

The article begins, "Moore's Law is set to come to an end.The end of Moore's Law, where transistor density doubles approximately every two years, has been reportedly just a few years away for what seems like decades now."

"TSMC's smallest architecture is a 20nm process, which it claims has "30 percent higher speed, 1.9 times the density, or 25 percent less power [compared with] its 28nm technology."Intel is claiming similar process geometries."

"Shrinking nodes to this level creates several difficulties.Here we look at the role digital power is playing to help address some of the challenges brought on by Moore's Law, moving it from a recommended to a required technology in many new applications."

Read the full article on eetimes.com
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